Course 2 - RSLogix500 / SLC500 Advanced Programming

Section 1     Advanced Math Instructions
1.1         Objective
1.2         Exercise – Square Root
1.3         Exercise – Compute
1.4         Exercise – Negate

Section 2     Advanced Timer and Counter
2.1         Objective
2.2         Exercise – Retentive Timers
2.3         Exercise – Time off Delay
2.4         Exercise – Count Down Timer

Section 3     Advanced Comparison Instructions
3.1         Objective
3.2         Exercise - Limit Test
3.3         Exercise – Masked Equal

Section 4     File Operations
4.1         Objective
4.2         Exercise – File Fill
4.3         Exercise – Copy File

Section 5     Processor Faults
5.1         Objective
5.2         Exercise – Causing and Clearing Faults
5.3         Exercise – Preventing Faults

Section 6     Indirect Addressing
6.1         Objective
6.2         Exercise – Indirect Addressing
6.3         Exercise – Indirect Addressing Faults
6.4         Exercise – Preventing Indirect Addressing Faults

Section 7     Advanced Instructions
7.1         Objective
7.2         Exercise – Shift Registers
7.3         Exercise – Sequencer
7.4         Exercise – Labels and Jumps
7.5         Exercise – First In/Out

In addition, access to "Inhibiting I/O in the SLC500 for simulation and fault recovery" video is included in this training to allow the student to learn simulation principles and methods.

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SECTION 1 - (PREVIEW ONLY)

Advanced Math Instructions

This section will cover more advanced math instructions.

Exercise 1 - Square Root (SQR)

Exercise 2 - Compute (CPT)

Exercise 3 - Negate (NEG)

SECTION 2 - (PREVIEW ONLY)

Advanced Timer and Counter

This section will cover more advance timers such as the Retentive Timer and Time Off Delay Timer. Also covered in this section will be the Count Down counter.

Exercise 1 - Retentive Timer (RTO)

Exercise 2 - Time Off Delay (TOF)

Exercise 3 - Count Down Counter (CTU)

 

SECTION 3 - (PREVIEW ONLY)

Advanced Comparison Instructions

This section will cover additional comparison instructions such as the LIM and MEQ instructions.

 

Exercise 1 - Limit Test (LIM)

Exercise 2 - Masked Equal (MEQ)

SECTION 4 - (PREVIEW ONLY)

File Operations

This section covers file operation such as the FLL (Fill File) and COP (Copy) instructions used to move values to multiple register is on processor scan.

Exercise 1 - Fill File (FLL)

Exercise 2 - Copy File (COP)

SECTION 5 - (PREVIEW ONLY)

Processor Faults

This section will introduce processor faults showing how to cause a processor fault, clear a fault and methods for preventing a fault.

Exercise 1 - Causing and Clearing Faults

Exercise 2 - Preventing faults

SECTION 6 - (PREVIEW ONLY)

 Indirect Addressing

The section will introduce programming with indirect addressing. While indirect addressing is not recommended in some instances it is a necessity. It is very important to be cautious when using indirect addressing in an SLC to avoid faulting the processor. The section below will cover faulting the processor with indirect addressing and step that can be taken to avoid this.

Exercise 1 - Indirect Addressing

Exercise 2 - Indirect Addressing Faults

Exercise 3 - Preventing Indirect Addressing Faults

SECTION 7 - (PREVIEW ONLY)

Advanced Instructions

This section covers advanced instructions useless for program sequence and control.

Exercise 1 - Shift Registers (BSL)

Exercise 2 - Sequencer (SQO)

Exercise 3 - Label/Jump (LBL,JMP)

Exercise 4 - First In / First Out (FFL,FFU)